- 积分
- 3846
- 在线时间
- 7435 小时
- 最后登录
- 2024-4-28
- 阅读权限
- 120
- 精华
- 12
 
- UID
- 176
- 帖子
- 3379
- 精华
- 12
- 经验
- 3846 点
- 金钱
- 2486 ￥
- 注册时间
- 2004-3-26
|
快速运方我认为有两种形式，
一种就是电流反馈形式，但因其两个输入端不对称，不好完全替代电压运放，所以出来LM6172 LT1361等改进型，内部电路如下
电路原理：
The LT1361/LT1362 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs are buffered by complementary NPN and PNP emitter followers which drive a 500W resistor. The input voltage appears across the resistor generating currents which are mirrored into the high impedance node. Complementary
followers form an output stage which buffers the gain node from the load. The bandwidth is set by the input resistor and the capacitance on the high impedance node.
The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R1, so the slew rate is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 10V output step in a gain of 10 has only a 1V input step,whereas the same output step in unity gain has a 10 times greater input step. The curve of Slew Rate vs Input Level illustrates this relationship. The LT1361/LT1362 are tested for slew rate in a gain of –2 so higher slew rates can be expected in gains of 1 and –1, and lower slew rates in higher gain configurations.
The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When driving a capacitive load (or a low value resistive load) the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance slows down the amplifier which improves the phase margin by moving the unity-gain frequency away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase to ensure that even for very large load capacitances, the total phase lag can never exceed 180 degrees (zero phase margin) and the amplifier remains stable.
还有一种就是仍然是差分电压放大，但采用加大差分的射极电阻（例如LM318 NE592等早期使用)、采用折叠沃尔曼电路（LM6341）来获得高性能，对于这种电路结构来说，虽然用到电流镜，但并不能算入电流反馈CFB的模式，下面是LM6341内部电路
国半文档描述如下：
The LM6361/LM6364/LM6365 family of op amps are wide-bandwidth monolithic amplifiers which offer improved speed and stability over many other op amps, at low cost,with little-to-no penalty in power supply consumption.
These advantages are due to a new process, developed by National Semiconductor, which provides lateral PNP transistors with nearly the gain and speed characteristic of NPN transistors—while the NPNs maintain their usual high performance. This allows the use of both NPN and PNP transistors in the signal path, where previously the PNP transistors severely limited the speed of linear devices. (Standard lateral PNPs have 1/10th the gain and 1/200th the bandwidth of standard NPN transistors.)
Traditional high-speed op amps often either used all-NPN circuitry (which usually severely limits the input, output, and power supply voltage ranges); used feed-forward techniques (which reduce stability); or resorted to costly hybrid design. Amplifiers made from this new process (dubbed VIP, for “Vertically-Integrated PNP”) operate from a 5V to 30V (total) supply voltage, and have standard input and output voltage ranges. In addition, they require comparatively little supply current, and are available in standard 8-pin dual-in-line packages.
The first devices produced with this process are three op amps—each with the same basic design but compensated to different degrees. The schematic of the unity-gain-stable LM6361 (see Figure 1) has a simple but effective form. The VIP transistors can now be used in the signal path, so a fairly traditional NPN differential input stage can be followed by a folded cascode wide-bandwidth gain stage. The input stage uses emitter-degeneration resistors to reduce its transconductance (Gm). The bandwidth of the amplifiers is then set by the ratio of Gm to compensation capacitance. This also determines the stability of the amplifier.
The compensation capacitance is stray capacitance (about 0.5 pF) which is seen lumped together at the front of the output stage. This output stage has a classic AB design, but since it contains a VIP transistor it has the speed necessary for a high speed amplifier. Additional capacitance on the
output effectively increases the total compensation capacitance, increasing the stability of the amplifier but also reducing the bandwidth. This “compensation” is not ideal, however, so transient response may be degraded.
The step response (Figure 2) demonstrates the stability of the LM6361. The amplifier was set up as a unity-gain follower,with a 6V input step. The output has a small overshoot and settles quickly to its final value. This well-behaved response is due to the simplicity of the compensation, which can be seen in the frequency response (Figure 3). It shows a smooth one-pole rolloff beyond 50 MHz; where the gain has dropped to unity, with a phase margin of 45°; the next pole is introduced after 100 MHz.
The LM6364 and LM6365 are based on the LM6361 design. The LM6361’s 600Ω emitter degeneration resistors are reduced to 150Ω in the 6364 to produce an op amp with gain-bandwidth product of 175 MHz, stable to a minimum gain of 5. In the 6365 the resistors are eliminated altogether,
for a GBW of 725 MHz and minimum gain of 25. All three devices have slew rates guaranteed (and 100% tested) to be over 200 V/μs (the slew rates are typically 300 V/μs).
Since the emitter degeneration resistors contribute to offset voltage and input voltage noise, the device with the widest bandwidth also has the best DC specs. The high gain of the transistors used in the common design, combined with the configuration used, give these op amps their high speed without consuming a lot of power. Supply current is guaranteed to be less than 6.8 mA (with ±15V supplies) for each of the three devices. |
|
楼主
发表于 2007-11-21 10:26
）有一个对称的输入端，都是在输入对管的发射极上，分别通过他们各自的电流镜（高阻抗）然后通过恒流源（也是高阻抗）最后接地。结果，所有的输入端子的等效输入阻抗高达 10mohm！
