D类功放D1K时钟版 附文件
Hello guys, in this post I will share the PCB layout power amplifier Class-D D1K Clocked. Power Amplifier uses an external clock, using the CD4049 IC as a triangle signal generator. The following is a schematic image, this scheme was designed by Mr. Kartino Surodipo Master Class-D from Indonesia.Power Amplifier Class-D D1K Clocked
You can download the schematic above as a PDF file, so you can see a clearer schematic image. Class-D D1K Clocked using External Clock from IC CD4049 as its triangle wave generator. IC CD4049 is very vital, use a good quality IC. so that the shape of a good triangle signal is flawless, if you use a bad IC CD4049, this will result in bad sound output too. Usually, there is a large amount of noise, and even worse, the amplifier cannot run, because the triangle wave does not come out of the CD4049 IC. to balance the PWM gate you can set the trimpot slope balance. and trimpot freq to set the PWM frequency.
And need to pay attention again to the 5V supply, the 5V supply must be balanced too, otherwise, we will have trouble setting the slope balance.
Power Supply 90VDC Symmetrical.
高清原理图
本帖最后由 diympgr 于 2025-7-19 20:51 编辑
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感谢分享 三角波为什么要用方波经过RC产生，这种方式的‘三角波’是非线性的，如下图，
会导致脉冲宽度和输入信号不成比例，例如0.1V的输入信号的脉宽是1us，0.2V的脉宽是2.2us
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